Revitalizing the Chip Startup Environment
Revitalizing the Chip Startup Environment One of today’s biggest Silicon Valley gripes is the evaporation of venture capital (VC) funding for chip startups. Since the dotcom bust, consumer application-driven silicon innovation has been reduced to a relentless chase after Moore’s Law – improving power, cost and speed for incremental multimedia and wireless enhancements in a race down the consumer product generational roadmap to Inventiveness Oblivion.
With 40+ years combined founding and joining startups and working for giant chip and systems companies, the authors have seen Valley booms and “game changer” technologies come and go. Now, though, industry veterans feel Silicon Valley isn’t re-evolving, but dying. Read More
latest news
May 17, 2012
MEMS Industry Group Explores Product Realization at Sensors Expo & Conference 2012
May 11, 2012
TI gives $2.2 million to re-energize introductory electronics courses at UC Berkeley
May 03, 2012
Design the next innovation in EAGLE V6 on element14’s EAGLE design competition
Avnet Electronics Marketing Kicks Off North American X-fest 2012 Technical Seminars
April 20, 2012
April 13, 2012
System-on-Chip Contest Challenges MIT Students with ARM Core and Digilent’s Xilinx-Based FPGA Kits
April 11, 2012
April 03, 2012
Atmel University Program Kicks Off 2012 Robotics Contest
March 26, 2012
Avnet Express' Drive for Innovation Exclusive Sponsor of the DESIGN West University Grant Program A
March 09, 2012
LPI announces “Linux Essentials” Program
March 06, 2012
Cadence Offers IC Design Program for Start-Ups in Australia
February 27, 2012
New embedded consortium for standardization management
February 14, 2012
Tektronix Donates Electronics Test Equipment to Washington State University Vancouver
February 13, 2012
February 08, 2012
Basketball That Doesn’t Lead to the NBA
High School Kids Learn About Engineering Through Competition and Cooperation
Abstracting Out
Designing Ourselves Out of a Job
Open vs. Closed: A Design Dilemma
Open Design Philosophy Can Affect Both Cost and Reliability
Bridging the Gap
The Real World Meets Innovation At The Avnet Tech Games
Don’t Be Evil
Do Your 2012 New Year’s Resolutions Include Being a Better Designer?
Understanding the 99%
Engineering Team Teardown
Editors' Blog
The New (Pro)Vocative
The New (Pro)Vocative @Readers: There’s a new way to be cool: constantly show the world that you use Twitter or know people that use Twitter or just notice that @ sign all over the place and figured out how to use it. 1 (7-May)
Minding the Home Front
Employers are increasingly concerned that they need to know more about you before and even after they hire you. What does that mean for you? (1-Apr)
Time to Get Loud
When everyone is tweeting and texting and messaging and Liking, how can you be heard? (1-Apr)
FIRST Follow-up
The Bottie Builders get the right balance. (29-Mar)
A Conference Presentation Figure of Merit
Ever wonder if there was a better way to measure the effectiveness of conference presentations than those silly rating sheets that you never fill out anyway? (9-Mar)
forum
Wirelessly Going Where No Man Has Gone Before
Posted on 05/18/12 at 4:19 PM by jyeh
Ready, Set, Embed!
Posted on 05/18/12 at 3:35 PM by amelia
Springtime in the SoC
Posted on 05/17/12 at 11:25 AM by Parag
This will be auto temperature and humidity controller for the farms. …
Racing Electronics
Posted on 05/16/12 at 1:22 PM by Jim Turley
MIPS Plants a New Family Tree
Posted on 05/15/12 at 5:17 PM by kevin
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Integrating High-Level Synthesis Designs into SoCs with Less Effort and Risk
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Methods and Tools for Bring-Up and Debug of an FPGA-Based ASIC Prototype
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FPGA Prototyping with the Kintex-7 KC705 Evaluation Kit
Chalk Talk sponsored by Xilinx
It's 2022: Do You Know What Your FPGA Is?
Chalk Talk sponsored by Altera
Troubleshooting and Fast Fault Isolation with VTOS
sponsored by Kozio
A Platform for Reducing Verification Time and Improving Reliability of Embedded System Hardware
White Paper sponsored by Kozio
Power Supply Management in High-Availability Systems
Chalk Talk sponsored by Microsemi
High-Reliability in FPGA Design - SEU Mitigation
Chalk Talk sponsored by Synopsys